An AC peak detector is a non-linear circuit used to obtain a steady state amplitude at the level of the peak amplitude of an input AC signal. The input signal AC signal need not be a uniform sinusoid, or infinite sum of sinusoids as in a square wave signal, but any signal with approximately complementary positive and negative voltage peaks, +V.sub.pk and -V.sub.pk, such as a data communication signal.
A number of different peak detector designs are known, however, each design has shortcomings which limit the range of operability and performance within that range. In particular, there is a need for peak detectors which detect peaks with amplitudes as low as 50 or even 20 millivolts. The known designs do not demonstrate acceptable performance at such low levels.
Generally, peak detector designs employ a semiconductor junction using one of two models. The first models a semiconductor junction as a solid state switch having finite states of being opened or closed. A peak detector using such a model only allows increases in the peak signal above a stored peak signal level, to close the solid state switch allowing the new peak to be stored. The second models a semiconductor junction as having an exponential relationship between voltage drop and current. A peak detector using this model assumes that peak voltages will dominate current flow through the junction, because the current flow during the peak will be exponentially larger than at other voltages.
Referring to FIG. 1, a peak detector circuit incorporating a diode as a solid state switch is shown. This circuit receives an input signal V.sub.in, and produces a peak output signal V.sub.out. A first capacitor C1, is used to couple the AC components of the input signal V.sub.in to the peak detector circuit and to block DC components. The resistor R1 offers a termination resistance for the input signal V.sub.in, to balance with the impedance of the V.sub.in signal source.
The diode D1, capacitor C2 and resistor R2 make up the components of the peak detector in this circuit. As noted above, the diode D1 is being employed as a solid state switch. When the potential across the diode D1 exceeds its threshold voltage, it is said to be in forward bias, and will conduct. When the potential difference is less than the threshold voltage, the diode D1 is said to be in reverse bias, and will not conduct.
When an input signal V.sub.in has sufficient potential to forward bias diode D1, it conducts, and begins to charge capacitor C2. This capacitor C2 will slowly discharge through resistor R2 if the diode D1 returns to reverse bias. If the input potential V.sub.in, drops, it will not have the potential to forward bias diode D1, and it will return to reverse bias and not conduct. The output signal V.sub.out will be equal to the potential stored in capacitor C2, which will be equal to the peak voltage of V.sub.in less the voltage required to forward bias diode D1. In order to compensate for the voltage drop across diode D1, a compensation circuit 10 may be added to increase the output by a corresponding voltage.
The circuit shown in FIG. 1 is not suited to low amplitude input signals because a new peak amplitude must be greater than the stored amplitude by an amplitude equal to the diode threshold voltage, in order to forward bias the diode D1. Even though a compensation circuit may translate the stored peak by the amount of this diode threshold voltage, subsequent peaks will not forward bias the diode D1 unless they exceed the old peak by this threshold amplitude. In general, therefore, this circuit has little use for input signals V.sub.in with peak amplitudes less than about 500 mV.
A second peak detector design is shown in FIG. 2a, employing the model of a semiconductor junction as having an exponential relationship between current and voltage. This type of peak detector is suitable for AC input signals with peak amplitudes less than the threshold voltage of the diode.
As in FIG. 1, this circuit receives an input signal V.sub.in on capacitor C1 which couples the AC components of the input signal V.sub.in to the peak detector circuit and blocks DC components. A constant voltage source V.sub.ee and a current limiting resistor R3 ensure that diode D2 is always forward biased, so that it functions as a non-linear element and will not act as a switch as in the circuit of FIG. 1.
This circuit also employs a low pass filter in the form of resistor R4 and capacitor C3 to remove high frequency components from the peak detector output V.sub.davg. These two components may or may not be used in existing implementations.
The peak output signal V.sub.davg of this circuit will not be equal to the peak voltage of the input signal V.sub.in, but will be equal to the average voltage drop across the diode D2. Because the constant voltage source V.sub.ee ensures that diode D2 is always forward biased, the average voltage drop across the diode D2, or V.sub.davg, will follow the positive peak +V.sub.pk of the input signal V.sub.in.
The non-linear operation of the diode D2 is best described with respect to the graph of diode current I.sub.d versus diode voltage drop V.sub.d exponential curve in FIG. 2b. Assuming this circuit feeds a high impedance device, the current through the diode D2 will be equal to the current through the resistor R3. Following the exponential curve of the diode, the majority of the current through resistor R3 is supplied during the phase when V.sub.d =V.sub.davg +V.sub.pk. The value of V.sub.davg +V.sub.pk, or V.sub.offset, is constant and independent of V.sub.pk, therefore the positive peak of the input signal V.sub.in can be measured as V.sub.offset -V.sub.davg =V.sub.pk.
Although the peak detector design shown in FIGS. 2a and 2b may detect peaks below the diode threshold voltage, it suffers from a number of deficiencies. It is clear from the description above, that this circuit may only feed a high impedance device and also that an additional circuit is required to perform the V.sub.offset -V.sub.davg =V.sub.pk compensation. Known designs of such circuits compromise the linearity and input signal range, and do not solve the problem of offset drift. As well, this circuit does not offer impedance matching with the source of the input signal V.sub.in.
Other peak detector circuits employ diodes and operational amplifiers as "ideal diodes". These circuits typically employ a diode as a solid state switch, but without requiring the input signal to be greater than the threshold voltage of the diode. However, because these designs require the input signal to pass through the operational amplifier, they are limited to low speed applications within the parameters of the operational amplifier.
There are also peak detector circuits which use operational amplifiers and diodes as switches in a feedback loop. In addition to the speed limitations, these circuits have an "overshoot" problem. When the diode switch becomes reverse biased, it opens the feedback loop, so the operational amplifier no longer receives a feedback signal and "overshoots" its target.
Several attempts have been made to prevent this "overshoot" due to open loop gain by adding additional circuitry. One arrangement is to use a high performance operational amplifier which has a more stable open loop gain, but this is more expensive than a standard operational amplifier, and it only reduces the effect, but does not eliminate it. A second arrangement is to add a clamping circuit to block the overshoot, which requires additional components, and again, reduces the problem but does not eliminate it.
One application of low amplitude peak detectors is in the measurement of signals in fibre optic receivers, but there are a growing number of applications as circuits continue to be designed for lower supply voltages, lower signal levels and higher speed operation. Potential applications include: automatic gain control, signal power measurement, signal loss detection, output driver calibration and signal demodulation.
There is therefore a need for a low cost AC peak detector for low amplitude AC signals over a broad range of frequencies. This design must be provided with consideration for the cost of electrical components, circuit manufacturing and physical board area.